GeForce 10 series Explained?

The GeForce 10 series is a number of graphics processing units produced by Nvidia, initially predicated on the Pascal microarchitecture announced in March 2014.

Source: thue gpuhub render theo gio

This design series succeeded the GeForce 900 series, and is succeeded by the GeForce 16 series and GeForce 20 series using Turing microarchitecture.

On March 18, 2019 Nvidia announced that in a driver update due for April 2019 they might enable DirectX Raytracing on 10 series cards you start with the GTX 1060 6GB, and in the 16 series cards, an attribute reserved to the Turing-based RTX series up compared to that point.

Architecture

The Pascal microarchitecture, named after Blaise Pascal, was announced in March 2014 as a successor to the Maxwell microarchitecture. The first graphics cards from the series, the GeForce GTX 1080 and 1070, were announced on, may 6, 2016, and had been released several weeks down the road May 27 and June 10, respectively. The architecture includes either 16 nm FinFET (TSMC) or 14 nm FinFET (Samsung) technologies. Initially, chips were only stated in TSMC's 16 nm procedure, but later chips had been made out of Samsung's newer 14 nm procedure (GP107, GP108). In August 2016, Samsung and Nvidia entered an agreement to shrink the die design of the complete Pascal architecture series to 14 nm.

New Features in GP10x:

• CUDA Compute Capability 6.0 (GP100 only), 6.1 (GP102, GP104, GP106, GP107, GP108)
• DisplayPort 1.4
• HDMI 2.0b
• Fourth generation Delta Color Compression
• PureVideo Feature Set H hardware video decoding HEVC Main10 (10 bit), Main12 (12 little bit) & VP9 hardware decoding (GM200 & GM204 didn't support HEVC Main10/Main12 & VP9 hardware decoding)
• HDCP 2.2 support for 4K DRM protected content material playback & streaming (Maxwell GM200 & GM204 lack HDCP 2.2 support, GM206 supports HDCP 2.2)
• NVENC HEVC Main10 10 bit hardware encoding (except GP108 which doesn't support NVENC)
• GPU Boost 3.0
• Simultaneous Multi-Projection
• HB SLI Bridge Technology
• New memory controller with GDDR5X & GDDR5 support (GP102, GP104)
• Dynamic load balancing scheduling system. This enables the scheduler to dynamically adjust the quantity of the GPU designated to multiple tasks, making certain the GPU remains saturated with work except when there is absolutely no more work that may securely be distributed. Nvidia consequently has safely allowed asynchronous compute in Pascal's driver.
• Instruction-level preemption. In graphics tasks, the driver restricts this to pixel-level preemption because pixel tasks typically finish quickly and the overhead costs to do pixel-level preemption are lower than performing instruction-level preemption. Compute tasks get either thread-level or instruction-level preemption. Instruction-level preemption pays to because compute tasks may take long times to complete and there are no guarantees on whenever a compute task finishes, therefore the driver enables the expensive instruction-level preemption for these tasks.
• Triple buffering implemented in the driver level. Nvidia calls this "Fast Sync". It has the GPU maintain three frame buffers per monitor. This results in the GPU continuously rendering frames, and the lately completely rendered frame is usually delivered to a monitor every time it requires one. This removes the original delay that double buffering with vsync causes and disallows tearing. The expenses are that more memory is consumed for the buffers and that the GPU will consume power drawing frames that could be wasted because several frames may be drawn between your time a monitor is definitely sent a frame and enough time the same monitor must be sent another frame. In this instance, the most recent frame is picked, causing frames drawn following the previously displayed frame but prior to the frame that's picked to become completely wasted. This feature has been backported to Maxwell-based GPUs in driver version 372.70.

Nvidia has announced that the Pascal GP100 GPU will feature four High Bandwidth Memory stacks, allowing a complete of 16 GB HBM2 on the highest-end models, 16 nm technology, Unified Memory and NVLink.